=EF=BB=BF

Craig,

I wanted to let yo= u know the boards arrived safely today. Thanks for the backplane and memory c= ard. Any suggestions as to the 72 pin edge connector part number (or the pin= spacing) used on the backplane?

Also, I wanted to Thank You for th= e effort you put into finding the issue with the eproms. I didn=E2=80=99t ex= pect that to be a problem.

Hopefully a new eprom programmer will prevent an= y future problems.

I will be interested to see your troubleshooting v= ideo.

Thanks Again.

Regards,

George

<= /o:p>

From:= SBC-85 <craig@sbc-85.com>
Sent: Wednesday, Sept= ember 24, 2025 10:17 PM
To: adamsgl@cinci.rr.com
Subject: Re: nibbler power up and test

It took several= erase cycles before the eprom was blank, so maybe that was a problem too. &= nbsp;I put your boards in the mail today

On S= ep 24, 2025, at 6:26=E2=80=AFPM, adamsgl@cinci.r= r.com wrote:

=EF=BB=BF
Craig,
<= o:p>
The ep= rom issue appears to be from the minipro programmer I have. It does not prod= uce the correct VPP voltage when programming (set for 21 volts and it produc= es 18v). As a result, the eprom appears to program correctly, and will verif= y correctly.
I checked the eprom after a few hours, and the contents d= id not verify. I thought maybe the eprom was bad but the same result occurre= d on one other.

So the end result is a new programmer is in order.= I selected the T48 from XGecu. Hopefully this fixes the problem.
&nb= sp;
Regards,

George

From: craig@sbc-85.com <craig@sb= c-85.com>
Sent: Thursday, September 18, 2025 8:12 PM
To: adamsgl@cinci.rr.comSubject: RE: nibbler power up and test

Hi George,

So the good news is I don=E2= =80=99t think there is a problem with your board.
=
I finally p= ut your eproms in my board and it would not fire up so I checked their conte= nts. Below are the roms is the high rom. My copy of NIBL is on t= he left, your EPROM on the right. I think you have a bad bit in t= his eprom. 0x01 should be C2 but it is C3 in yours. Bit 0 stuck h= igh
04 should be 40 but is 41 in yours
0A should be 37, yours is F7=
0f sh= ould be FE, yours is FF

= I am erasing your eproms and see if I can p= rogram them and then check them again. Maybe you just have a lazy colu= mn of bits or two. I downloaded but have not checked the low rom, I am= just going to erase them both.
=
Look at your hex file to make sure i= t matches the list file in the manual.

<image001.png>

From:= craig@sbc-85.com <craig@sbc-85.com>
Sent: Th= ursday, September 18, 2025 4:47 PM
To: 'adamsgl@cinci.rr.com' <= adamsgl@cinci.rr.com>
S= ubject: RE: nibbler power up and test
<= p class=3D"MsoNormal">
I ran various diagnostics on your board with my new p= rogram. everything seemed to check out but it still would not run NIBL= . So I put in my NIBL eproms, see below.
Investigating further=E2=80=A6= . But your board is alive.

<image002.png>
<= /span>
From:= = adamsgl@cinci.rr.com <adamsgl@cinci.rr.com>
Sent:<= /b> Thursday, September 18, 2025 12:47 PM
To: craig@sbc-85.com
Subject: RE: nibbler power up= and test

Craig,
&= nbsp;
Initially I used power up, (got tired of that) but wasn=E2=80=99t sur= e if the reset was sufficient, so I placed a button on U1A-1,2 and the other= side to ground. This seemed to successfully reset the chip. I could then ho= ld the chip in reset as long as I wanted.

Regards,

George<= /span>

= = From: craig@sbc-85.com &l= t;craig@sbc-85.com>
Sent:<= /b> Thursday, September 18, 2025 2:42 PM
To: adamsgl@cinci.rr.com
Subject: RE: nibbler p= ower up and test
&nb= sp;
Hi= George,

Do you have a reset button on the nibbler that you use af= ter power up? Or just relying on the power up to cause a reset?=
= ;
Regards
craig

From: craig@sbc-85.= com <craig@sbc-85.com> Sent: Tuesday, September 16, 2025 2:04 PM
To: 'adamsgl@cin= ci.rr.com' <adamsgl@cinci.rr.com<= /a>>
Subject: RE: nibbler power up and test

Hi George,
I have been working on my d= iagnostic utility so I haven=E2=80=99t gotten to your board yet. Howev= er, one round of testing the utility I decided to pop it in your board so I c= ould tell you something. After several resets, the utility program started a= nd sent out the command prompt. I then started a memory test and it fo= und the first block of RAM.

So the board works at some level= .

I will let you know as I have more.

=
From: adamsgl@cinci.rr.com <adamsgl@cinci.rr.com>
Sent: Saturday, Septembe= r 13, 2025 4:28 PM
To: craig@s= bc-85.com
Subject: RE: nibbler power up and test

Craig,
=
You are welcome t= o use the board in your videos. The more troubleshooting skills you present,= the more everyone benefits.

Just blur out the name and address I p= ut on it.

Good old ebay parts, =E2=80=98removed from working system= =E2=80=99. Good story.

<= span style=3D"font-size:11.0pt">Will be interesting to see what you find on m= y board.

Nice video (#143) on the status of the nibbler workalikes.= I am really interested in the eprom board. I would like to see the i/o boar= d, with the national i/o chip and an option to use an 8255 if the national c= hip is hard to find. ( I only found one on ebay and it was > $40).=
= ;
Regards,

George

<= p class=3D"MsoNormal">From: craig@sbc-85.com <craig@sbc-85.= com>
Sent: Saturday, September 13, 2025 6:40 PM
To:<= /b> adamsgl@cinci.rr.com
S= ubject: RE: nibbler power up and test
<= p class=3D"MsoNormal">
Hi George,

Board arrived safely. I am s= till adding features to my diagnostic code.
You are not the only one= having trouble getting the board up and running, everyone is using scrap ch= ips it seems. Can I use your board for a diagnostic video?=

From: adamsgl@cinci.rr.com <adamsgl@cinci.rr.com>
Sent: W= ednesday, September 10, 2025 1:28 PM
To: craig@sbc-85.com
Subject: RE: nibbler power up and t= est

Craig,
<= /span>
I sent you the return postage ($12)

My testing hardware is the Sale= a 8 channel logic probe, a logic probe, and the voltmeter for continuity che= cks. The programmer I have can also test some of the newer chips.

T= he memory scan started at 2000, since the eprom was 0000-1FFF (resulting in t= he P being shown).
The assumption I made was write a value, if it didn=E2=80= =99t read back the same then check if it was something other than FF or 00 t= hen it was an eprom. (shows something is there)

Board status, here i= s what I saw:
4 mhz clock on u1.11 (CLOCK_P2)
NRDS was toggling on the pro= cessor.
Cs0 and cs1 were toggling (not sure why cs1 was, as the code never a= ddressed anything (only the lower 24 bytes) where ad10 or 11 were anything b= ut 0, which should give only cs0)(unless I=E2=80=99m missing something)
Als= o ad12 was always 0.
I don=E2=80=99t believe any of the other cs lines were= changing.

As for the diagnostic code:

=
Yes, using the sense= A/B lines to select the test is a good idea, for test1
=

Good idea fo= r testing only 1 bit and showing the status then continuing bit by bit to co= nfirm the byte is good.

= My wish list would be to be able to s= ingle step the processor, holding the status, and address lines in the state= to read memory and see what address is being read from and the value on the= data bus. (not readily available since the single step is not in the design= ). I have used this on the 8085 boards by holding the ready line low.=
= ;
Regards,

George

<= div style=3D"border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0i= n 0in">
From: craig@sbc-85.com <craig= @sbc-85.com>
Sent: Wednesday, September 10, 2025 1:58 PMTo: adamsgl@cinci.rr.com
Subject: RE: nibbler power up and test

<= span style=3D"font-size:11.0pt">Hi George, I actually owe you a few do= llars because the last board cost less to send than expected and what you al= ready paypal=E2=80=99d me. It shouldn=E2=80=99t cost any more to send b= ack than to send to me.

= Absolutely get the retro chip tester pro=E2= =80=A6 annoying interface but otherwise worth every penny. That and my= Salea 16ch logic probe I bought the moment they became available are my got= o tools.

It will be interesting to see what is wrong with y= our board, if it is the CPU or not. Please confirm this is the board s= tatus:
It is giving a good clock on the output of that AND gate=
It is togg= ling NRDS
There are various chip selects coming from the decoder and with t= he test code I sent there were no chip selects on the upper half=
Are there a= ny other data points?

The memory scan you showed me, I didn=E2=80=99= t see any Ps show up, but I don=E2=80=99t see a way to tell if something is p= rom or empty.

I want to bounce some ideas off you regarding the dia= gnostic code.
The critical inputs, NRST, CONT, NENIN,BREQ,NHOLD are a= ll DC and can be confirmed with a volt meter.

The Test 1 that I a= lready sent you that sequences the flags and that will establish that the CP= U can fetch instructions.

I should have put a little more th= ought into this before you shipped the board=E2=80=A6.
=
If it= fails test1 like your board, I think the following can be done to confirm t= he CPU is working=E2=80=A6
Remove all buffers, the latch, and the decoder&= nbsp; could even remove the AND and NOT chips and patch across U1A on the NR= ST input.
Jumper across the three 81ls97 buffers U8 on the data input, u9 o= n the low address, u4 on the high address and signals.
=
Jumper the low ROM U= 10 chip select to ground and jumper it=E2=80=99s enable to NRDS.
Now= the CPU will pull instructions directly from the eprom and the RDS will avo= id bus contention on the data bus during the outgoing address/data cycle
&n= bsp;
it is hard to test the 8060 itself without fetching instructions, but i= f it has a good clock and is putting out seemingly correct NADS and NRDS str= obes I think it is a good sign that the CPU is internally functional but it c= ould still have a dead I/O line on the address or data. As far as the m= ost basic starting test I can=E2=80=99t think of anything simpler

O= nce the user gets past test1 and can fetch instructions, the next key thing i= s if the RAM works. Test1 gives the opportunity to also confirm the se= rial TxD is working which is just a couple of inverters more than Flag0 work= ing. So starting with test2 I begin sending status to the console.&nbs= p; I don=E2=80=99t send status in test 1 because it makes it harder to diagn= ose when looking at the waveforms after a reset.

Test2 is the first= ram test. I search all memory locations and when it finds a single bi= t of RAM it prints the address to the CO and a dash. By single bit, I l= iterally mean that=E2=80=A6. Only one bit has to work for it to be a valid r= am location=E2=80=A6 in these 1x ram banks, maybe just one ram chip works.&n= bsp; It then continues the test until all 8 bits fail and then it prints the= ending address of the block. Then a new line is sent to the CO and it= repeats. This will tell the user if they have any working ram=E2=80=A6= even a single bit=E2=80=A6. And it will give them the opportunity to diagno= se that.

Test3 is the same as test2 except the full byte of ram mus= t work to be considered a block
=
That is it for the ramless testing,= then the diagnostics can start using RAM and do more detailed memory testin= g to find bad bits.

But I think I will go back and add more fundamenta= l testing before the RAM testing. Test the sense inputs by doing somet= hing different on power up if the sense a/b input is at logic zero. If= they are confirmed working, then I can accept input from the terminal soone= r and let the user select tests.

I know this is a wide ranging emai= l, but let my know your thoughts.

Thanks
craig
=
From: adamsgl@cinci.rr.com <adamsgl@cinci.rr.com>
Sent: Wednesd= ay, September 10, 2025 9:31 AM
To: craig@sbc-85.com
Subject: RE: nibbler power up and test

=
Craig,

I pu= t the board in the mail today. (board should be delivered to you Saturday) T= he cost to ship was $11 including $100 insurance. Since you are send it back= with the memory and backplane boards, is $20 enough to cover the cost?
&nb= sp;
This is code I did for the serial doodad.
Here is what I did for a mem= ory scanner (starts with 2000 as I know the board has eprom below this addre= ss, but ideally should start with 0000)
;2000 ................<= /o:p>
;3000 .....= ...........
;4000 ................
;5000 ................
;6000 .........= .......
;7000 ................
= ;8000 ................
;9000 .............= ...
;a000 RRRRRRRR
;b000 ................
;c000 ................
;d000 ...= .............
;e000 ................
;f000 RRRRRRRR.
=

. is nothing= found
R is ram
P is eprom

Just a thought for complete memory sca= nner.

Regards,

= George

From: craig@sbc-85.com <craig@= sbc-85.com>
Sent: Tuesday, September 9, 2025 8:57 PM
To: adamsgl@cinci.rr.comSubject: RE: nibbler power up and test

Hi George,

Today I messed around trying= to get the AS assembler and I couldn=E2=80=99t get it to run in a dos windo= w so I gave up and installed the sbasm. I have been assembling and it s= eems to be working ok, once I finally started getting used to the syntax tha= t is. It is better than figuring out relative addresses by hand anyway= .

When I send back your board, I can also send the memory and the b= ackplane since I have those running OK. I think the memory board just h= as a couple of silkscreen errors.

I am expanding my ramless test to= now go through and do a simple test of the onboard RAM=E2=80=A6 at le= ast sending out to CO what blocks of RAM it can identify. So test 1 ju= st does that counting up of the flags. Once the user gets that going t= hen we can send things to the CO and test 2 can identify and print out RAM b= locks.

Since you have been dinking with a no-workie board, let me k= now what other tests would be useful.

Regards
craig

From: adamsgl@cinci.rr.com <adamsgl@cinci.rr.com>
Sent: Tues= day, September 9, 2025 4:53 PM
To: 'SBC-85' <craig@sbc-85.com>
Subject: RE: nibbler po= wer up and test
&nbs= p;
Cra= ig,

I will put the board in the mail tomorrow. After I see what the= cost is, I will paypal you the funds to send it back. I really appreciate y= ou doing this!!

The board does not appear to have any solder bridge= s or shorts, so it has to be a bad buffer or the 8060 itself.
=
The r= amless test was done with no ram installed and only U11 eprom installed with= the hex code you provided.

Nice work on the ramless test program. I= went through and figured out how it works. I see the pattern you talked abo= ut in your last video, load status register, do something with the bits and w= rite back to the status register. The common theme. I need to work thr= u the delay calculation in the next day or so.

=
I agree with you on t= he assembler link I sent you. It needs to be much simpler than the one in th= e like from me. If you find one, let me know.

I need to get the retro s= hip tester you have, since I am getting more and more boards with vintage ha= rdware, and no way to test some of the chips. Got to wait a bit longer, as t= he social security only goes so far.

Thanks Again for the assistance= in getting this running.

Regards,

George=

From: S= BC-85 <craig@sbc-85.com>
<= b>Sent: Monday, September 8, 2025 10:33 PM
To: adamsgl@cinci.rr.com
Subject: Re: nib= bler power up and test

Hi George. Just pay to s= hip it both ways. Make sure you sufficiently insure it to replace all the co= mponents.
<= /p>
My mailing address is
Craig Andrews
13500 ne 259th street
Battle ground, wa
98604

=
Please put a tag on it with your name and a= ddress. I hate to have other people=E2=80=99s things around in case so= mething happens to me, and family has no idea something on my bench belongs t= o someone else.
Regards=

=
Craig

On Sep 8, 2025, at 6:40=E2=80=AFPM, adamsgl@cinci.rr.com wrote:
=EF=BB=BF<= /span>
Craig,

That might be the best way to get this working without havi= ng to buy another 8060 if it=E2=80=99s not needed. Let me know the cost.
&n= bsp;
Regards,

George
<= span style=3D"font-size:11.0pt">

From: craig@sbc-85.com <craig@sb= c-85.com>
Sent: Monday, September 8, 2025 9:35 PM
To= : adamsgl@cinci.rr.com
Subject: RE: nibbler power up and test

The SC/MP folks on the UK vintage radio site seem t= o be smitten with that assembler. I downloaded it a week or two ago, b= ut have not gone as far as installing it. I am learning a lot by hand a= ssembling anyway.
Here is another assembler that seems way over the top for= what I need
The Macro= Assembler AS

I would like just a simple dos prompt assembler li= ke A85 I get from herb and use for my 8080/85 projects.
<= /o:p>
If you have= no confidence in your chips, I can test them for you. Or your whole b= oard for that matter

From: adamsg= l@cinci.rr.com <adamsgl@cinci= .rr.com>
Sent: Monday, September 8, 2025 6:20 PM
To:= craig@sbc-85.com
Subject:= RE: nibbler power up and test

Craig,
Here is an assembler I found while waiting on parts.=

https://github.co= m/sbprojects/sbasm3

= Kind of obscure to run it. Needs python 3 a= nd run by =E2=80=98python sbasm.py=E2=80=99 after getting into the folder wh= ere it was downloaded. Then will ask for the file to assemble (a pain)
&nbs= p;
Not sure yet about how close the opcodes are to standard. (look in the s= bprojects/test/opcodes folder for an example of the code)<= /p>

Now to fi= nd a sc/mp without costing a fortune.

Regards,
<= p class=3D"MsoNormal">
George=
= ;

From: craig@sbc-85.com <craig@sbc-85.com>
Sent: Mon= day, September 8, 2025 7:26 PM
To: adamsgl@cinci.rr.com
Subject: RE: nibbler power up an= d test

Right now th= is just repeats every 130ms. I think that I will add some RAM testing t= o the next version unless you think something else would be more useful.&nbs= p; I am still hand assembling so it is slow going.
=
<image00= 1.png>

From: craig@sbc-85.co= m <craig@sbc-85.com>
<= b>Sent: Monday, September 8, 2025 3:15 PM
To: 'adamsgl@cinci.r= r.com' <adamsgl@cinci.rr.com&= gt;
Subject: RE: nibbler power up and test

Hi George,

This will count the thre= e flag lines from 0 to 7 and then wait 131ms before repeating
=
From: adamsgl@cinci.rr.com <adamsgl@cinci.rr.com>
Sent: Mon= day, September 8, 2025 1:35 PM
To: craig@sbc-85.com
Subject: RE: nibbler power up and test

=
Criag,

I ha= ve an 8 channel logic analyzer and also a logic probe.
=

The clock si= gnal is 4 mhz from u1d.11.

Chip selects 0,1,2,3 (eproms) are toggli= ng, no activity on cs 4, 5,6,7 (rams)

Thanks for the help.

G= eorge

From:= craig@sbc-85.com <craig@sbc-85.com>
Sent: Mo= nday, September 8, 2025 4:18 PM
To: adamsgl@cinci.rr.com
Subject: RE: nibbler power up a= nd test
<= /o:p>
Hi George.&= nbsp; Well, that is inconvenient.

The nibbler test is part of the R= OMs.

I think jpb1 is installed and the input to the first inverter i= s taken low so sense b will be low. Then it does the test.=

Do= you have a good clock signal? Are you seeing anything on the read str= obe? Seeing anything on the chip selects for the eproms?

NIBL= is a bit of a problem since everything has to work before anything will wor= k.

Hold on a bit, I will write a little ramless test to send you.&n= bsp; Do you have a scope or logic analyzer or logic probe?=

From: adamsgl@cinci.rr.com <adamsgl@cinci.rr.com>
Sent: Monday,= September 8, 2025 1:08 PM
To: craig@sbc-85.com
Subject: nibbler power up and test

Craig,
=

I finally go= t all the parts for the nibbler and completed assembly. With that said, it=E2= =80=99s time for head scratching. No response on power up. So I tried the ni= bbler test in Gordon=E2=80=99s Digikey notes, again with no luck.
The chips= I can=E2=80=99t test are the rams (I only have 1k installed, from the listi= ng in the digikey notes it should be enough) the buffers and the sc/mp. Chip= . Any thoughts on the next steps.

I=E2=80=99m guessing the JPB1 jum= per needs to be removed to do the nibbler test.

Is the nibbler test= part of the code in the eproms or is it in the sc/mp hardware design? (it=E2= =80=99s not obvious if its in the eproms)

Thanks again for the help= .

Regards,

George

=

<image002.jpg>

Virus-free.www.avast.com

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<= /o:p>