=EF=BB=BF It=E2=80=99s a shame to take apart good bubble memories since they are hard t= o come by. Are you referring to the 2113 RAM? Or something else?

Sent from my iPhone

On Oct 9, 2023, at 11:19 AM, Paul Holowko <phol= owko@hotmail.com> wrote:

=EF=BB=BF

https://www.amazon.com/gp/aw/d/0824767950?ref=3Dpp= x_pt2_mob_b_prod_image Sent from my iPhone

On Oct 9, 2023, at 10:16 AM, SBC-85 <craig@sbc-= 85.com> wrote:

=EF=BB=BF

Hi Paul,

Yes, the controller was key to intels plans to make bubbles= a success. It is the controller chip that made intels components supe= rior. I am going to do a bubble die video similar to the one I just di= d for the intel 2113. I could use a few dead bubbles to dissect for die photographs. If yours are going just i= nto a paperweight, I would gladly pay for shipping to me.

What is this bubble book?

On Oct 9, 2023, at 7:43 AM, Paul Holowko <pholo= wko@hotmail.com> wrote:

=EF=BB=BF Hi Craig,

I just finished reading what I could find in bubble memory. It=E2=80=99= s amazing how they organize and time data going into and coming out of the m= inor loops. Having two bits for each looped timed by the spinning electro ma= gnets for generating bubbles and timing it into the input/output track for reading and writing. Wow!!!!! It=E2= =80=99s vey similar to a conveyer system used in dry cleaners. Access times s= uffer because of spinning around the loops multi times to get all of the dat= a in the block.

Whoever worked on the controller spent a lot of time figuring out how to acc= ess everything

As for the remaining dead bubble memories I have, i reseeded them with n= o luck to performance improvement. Other than one, none took the boot loop. I= t comes back and says =E2=80=9Cop code failed=E2=80=9D and =E2=80=9Ctiming e= rror=E2=80=9D. I=E2=80=99m really beginning to understand how this device works. It=E2=80=99s incredible. It=E2=80=99s way more complicated th= an core memory. It=E2=80=99s amazing the memory modules I have still w= ork after all these years. Bubble memory should be renamed to bubble juggle m= emory. I still think the 7220 was designed by a committee.

I found a bubble memory book. It=E2=80=99s ordered and I should receive= it in a week or so.

Thank you so much for your help. I believe the dead MBM devices I have w= ere made by me trying to get the board working. I never worked with type of s= erial memory before. I never interfaced a hard drive or floppy drive. <= /div>

Sent from my iPhone

On Oct 4, 2023, at 7:04 PM, craig@sbc-85.com wrote= :

=EF=BB=BF

You should not have to reseed more than once. T= he seeding pulse is strong enough to create more seed than is necessary in e= ach generator. However, I would ohm out the devices to see if maybe a s= eed or generator hairpin has been damaged.

You can create your own boot loop from scratch by wri= ting the loop with a bit 1 for the first 270 loops and then testing all 4096= locations. Then write a 1 only for the last 270 loops and test those l= ast 25 loops.

Identify which loops are good and then create a final= map to create boot loop.

Maybe an easier way is to just use the original boot l= oop data and which ever loop is giving bad data, swap it out with an unused l= oop in the map. Do that until you find an unused loop that is actually= good.

From: Paul Holowko <pholowko@hotmail.com>= ;
Sent: Wednesday, October 4, 2023 4:17 PM
To: craig@sbc-85.com
Subject: Re: Bubble memory updates

Hi Craig= ,

&nb= sp;

I got my= seeder working. One of the devices that did not bring up a boot loop n= ow does. Thanks to your help. Unfortunately, there is one or mor= e loops not working very well. I write all 0xaa and I read back 0x88 or 0x8a or some kind of combination. When the bo= ot loop is in place, the init works great. But with no seeds, it's har= d for the system to come up. It hangs. I could try reseeding and= making sure I got everything. Have you reseeded multi times to get all of the loops?

&nb= sp;

Do you k= now if there is any way I can test the memory and change the boot loop data t= o find any additional loops that may be working, but not included in the ori= ginal boot loop number set because enough are working for the device manufacturing?

&nb= sp;

&nb= sp;

Paul

&nb= sp;

&nb= sp;

From: craig@sbc-85.com <craig@sbc-85.com>
Sent: Tuesday, October 3, 2023 11:06 PM
To: 'Paul Holowko' <pholow= ko@hotmail.com>
Subject: RE: Bubble memory updates

If you do not have a seed, then when you try to writ= e a 1 it will write a zero. I am not sure if it flags that as an error= , but maybe so.

I presume shorting the resistor is required, intel w= ouldn=E2=80=99t have included it with a caution otherwise.

From: Paul Holowko <pholowko@hotmail.com>
Sent: Tuesday, October 3, 2023 3:31 PM
To: craig@sbc-85.com
Subject: Re: Bubble memory updates

It does not let me write a boot loop at all. It hang= s up. So, I=E2=80=99m going have to plant some seeds. Lol. I have about six o= r seven BM that have weird boot loops. One kind of works and i can follow th= e operating odd/even bits working in the boot loop number with respect to written data in memory. Others seem totall= y hopeless. But they kind of init. I=E2=80=99m assuming the init depends on a= good boot loop to work. I=E2=80=99m beginning to understand how this device= works. I think seeding will help me understand more how this contraption works. And your interaction is helping greatly. T= hank you

The BM from Poland all work.

Is it really required to short out the resisto= r at the 12 volt pin on the BM when doing seeding?

Paul

Sent from my iPhone

=

On Oct 3, 2023, at 1:= 50 PM, craig@sbc-85.com wrote:

=EF=BB=BF

In the bootloop data, 1 is a good loop, 0 is a bad l= oop. Even with the wrong bootloop data, the device may work reasonably= well if the =E2=80=98bad=E2=80=99 loops were just marginal and work most of= the time but didn=E2=80=99t meet long term retention criteria.

If you can write to a data loop, then the data loop s= eed is good. Through normal handling and precautions, I can=E2=80=99t i= magine a boot loop seed going bad but the data loop seed is still good.

You can tell quick enough if it lets you write the b= oot loop and the data is retained, then the boot loop seeds are OK.

From: Paul Holowko <pholowko@hotmail.com>
Sent: Tuesday, October 3, 2023 11:35 AM
To: SBC-85 <craig@sbc-85.com>
Subject: Bubble memory updates

Hi Craig,

I=E2=80=99m back at working the bubble memory board.= It=E2=80=99s reading and writing to the memory. I have about 6 or 7 other B= M that kind of works. I want to expand my horizons by trying to fix the boot= loop and/or do some bubble seeding. Since I have a board where I know the software works and I know the hardware works, I kn= ow it=E2=80=99s the BM device.

While trying to fix these BM modules, I=E2=80=99m le= arning how much I don=E2=80=99t understand these devices. Not the physics of= it, but the internal logic for loops and data management. <= /p>

I=E2=80=99m not sure how the boot loop number and th= e loop relate to each other. Does a zero on the boot loop number mean that=E2= =80=99s a bad track and not used?

It=E2=80=99s hard for me to figure out what=E2=80=99= s wrong with the device. They do and init, but the boot loop does not match.= However, the numbers are consistent each time I check. Does it mean when th= e boot loop is hosed, it=E2=80=99s probable it needs reseeding?

Paul

Sent from my iPhone

On Aug 14, 2023, at 6= :07 AM, Paul Holowko <pholowko@ho= tmail.com> wrote:

=EF=BB=BF

Hi Craig,

Thank you for the power information=EF=BB=BF. It hel= ps. It roughly take 190 ma to run the coils. I=E2=80=99m using a 12 volt pow= er supply and put in a buck switcher to go down to 5volts. If I use a linear= , it gets way too hot. The whole system takes 350 ma at idol and 500 ma or when spinning the magnetic field.

I got a response back from Poland about exchanging t= he first set of bubble memories. In stead of saying no, the lied and told me= we sold out. I got on line and bought their last five bubbles. Their last b= atch worked out, so I believe they maybe good and i did something to clear or break them.
=

On that note I have been writing routines to restore= the boot loop. Had mixed results. I got the boot loop to clear and write al= l 0xff, but i get a timing and parity error after running the write boot loo= p command. The enable boot loop bit is set. The bubble memory does not init anymore after writing 0x= ff.

Registers

0x10

0x00

0x18

0x00

0x00

I write to the FIFO, after aborting, flushing and re= seting the FIFO, the label set of numbers. And the 41st location gets 0x00

It comes back with op failed.

I wrote a FSA status routine. It helped writing my r= outines for watching for the fifo ready flag. It comes back with 0x42. = ;That is timing error and another item i don=E2=80=99t recognize. =E2=80=9C0= =E2=80=9D.

I appear to be making bubble memory hospital diagnos= ing routines. Lol. Any help would appreciated.

Paul =

Sent from my iPhone

On Aug 11, 2023, at 6= :28 PM, SBC-85 <craig@sbc-85.com&= gt; wrote:

=EF=BB=BF

The Z versions have a bulk erase so it is possible t= hey were erased when removed. Or maybe the bubble was unused.
=

The 7250 and 7254 pair increase by 1/2 watt when act= ively rotating, the 7110 increases a little more than 1 watt. I expect= that of that is on the 12v rail

Regards

Craig

On Aug 11, 2023, at 5= :39 PM, Paul Holowko <pholowko@ho= tmail.com> wrote:

=EF=BB=BF
And when the BM is seeking, to the address, does the whole system take an ad= ditional 200 ma to run the electro-magnets?

Thank you so much for helping with this. I=E2=80=99m= still having a great time.

I was thinking some old BMS would have old data on t= hem. But all zeros? I=E2=80=99ll try another BM and see if there is an= ything on that.

Paul.

Sent from my iPhone

On Aug 2, 2023, at 9:= 16 PM, Paul Holowko <pholowko@hot= mail.com> wrote:

=EF=BB=BF

Hi Craig,

Thank you for clearing up the +12 volt think. It=E2=80= =99s as clear as mud. Lol. I=E2=80=99ll check the resistance out later and g= et the darn thing going again. I have a loose wire someplace.

I just completed mounting my electric static filter p= ower supply. It produces 8KV that charge places where air passes and particl= es less then 0.3 um get filtered out. HEPA filters clean out 0.5 um and larg= er.

I designed the tank circuit for the oscillator. It w= iggles at 36KHz. I wound the transformer and did all the calculations.= Winding a step up transformer that is not 60 Hz has its own set of rules an= d tricks. It can run a laser tube with it. It runs off 12 volts AC or DC. 80 ma.

I=E2=80=99m going to Indiana in two weeks and the ai= r quality is really bad. The smoke came from Canada. I already had ch= ina cough and Covid. My lungs are done with bad air.

<image0.png>

<image1.jpeg>

<image1.jpeg>

<image2.jpeg>

=

Sent from my iPhone

On Aug 2, 2023, at 4:= 02 PM, craig@sbc-85.com wrote:

=EF=BB=BF

Hi Paul,

I also forgot to mention--- in addition to the fond n= ostalgia working with these brings me, it is an effort to keep my brain func= tional as I get older.

I think those that have an understanding of old hard= ware will have an advantage over those that do not. hopefully it will a= ll work out.

I think I have completed assembly of my 7110A bubble= board, I just need to start the testing with the dummy load and get the bub= ble in to see if the polish bubble works. the weather is very nice her= e, so I will not be sitting in my basement working on this. I wouldn=E2=80=99t be surprised if that takes a few w= eeks to get to the polish bubbles.

I have never designed for core memory. my expe= rience is limited to just being a user. I had a wang computer at one p= oint that used core memory.

When using the seed module, there is a resistor (R11= ) between +12V and pin 1 of the 7110 which needs to be jumpered to bring the= +12V directly to pin 1. That pin 1 is the pulse common (+12V), the cu= t, duplicate, etc., pull down the other end of the circuit to enable. I presume that resistor is to current l= imit those circuits but maybe it is just some degree of protection against s= horting, maybe noise filter. I guess that if the bubble still ohms out= OK, taking pin 1 directly to +12 may not be the worst thing in the world. I do not see where they specify that= resistor on the 7110 specification sheet, I can not recall ever seeing a de= scription about that resistor. I am just as confused as to why leaving= the resistor in would cause permanent damage during reseed.

regards

craig

From: Paul Holowko <pholowko@hotmail.com>
Sent: Wednesday, August 2, 2023 9:51 AM
To: SBC-85 <craig@sbc-85.com>
Subject: Re: Bubble memory questions (finally got boot number)

Hi Craig,

You are more than the best man to talk with about th= is. What you have described is my experience for the past 30 years with some= variations here and there. Your thinking is sound.

The internet is obsolete. So is Facebook, TikTok, Go= ogle and the rest. In time they will be put up on the obsolete garage shelf n= ext to bubble memory and Eight Track tapes. I have learned a tremendous amou= nt of information from doing old projects like this. Since I=E2=80=99m a systems engineer, the technology ch= anges, but systems don=E2=80=99t. So, I learn from the past different s= ystem architectures. For example, the interface of the 7220 to the outside w= orld shows too much of what goes on inside the bubble memory. It=E2=80=99s the same clumsy system architecture as the 4004 or 404= 0. I have taken the time to learn what i missed in the past to use for advan= cing future modern projects. Unfortunately, the same clumsy architecture is t= hroughout everything and we are stuck with it. I have looked at Alan Turing and his form of procedures. CPU= s are good at moving things around fast, not mathematics.

I have worked with th= e younger generation of EE; EE MS and PhDs I can=E2=80=99t tell you how many= younger generational I have thrown out because they want to jump off where t= heir parents are at; instead of leaning minimal basics.

History is repeating itself. And not only in compute= rs, but in the medical industry, music industry and food industry. Each repe= ating cycle involves way larger number of people, energy and resources. And e= ach cycle is worse or bigger. Sorry for being so dark...... =F0=9F=99=82

I want to thank you for putting the bubble memory pr= oject online. You have been more than kind. It has helped me tremendously. I= =E2=80=99m not sure where to get those resources and books anymore. Perhaps a= big library. I sure did not save them. And I find pockets of information here and there.

The core memory project will teach me a lot. I= t's older and more involved on a grass rooted level.  <= /p>

<= /span>

<= /span>

I have o= ne last question. There is a 12-volt jumper that needs to be put into p= lace when seeding. There was a wire bridge by accident shorting the ju= mper in normal operation, will that clear the BMB? Which condition will ruin the BMB?

Sent from my iPhone

On Aug 1, 2023, at 1:= 46 PM, SBC-85 <craig@sbc-85.com&g= t; wrote:

=EF=BB=BF

Hi Paul

Yea, I may not be the best person to ask because it m= akes absolutely no sense no make the effort.

I make build files available for free, in fact if so= meone is overseas, I try to convince them to submit directly to the board ho= use rather than pay shipping from the US.

Selling boards is, at most, breakeven.

I do not monetize YouTube, do not ask for patr= eons , etc. The most I ask is for people to reimburse shipping on the b= oards I give away.

I think I do a decent job at documentation and put u= sers manuals, instructions, BOMs, schematics, tons of software, build files,= etc., out there for free.

When someone uses my software or hardware as a start= ing point for their project, very few times it is credited back to me, but g= enerally it is not.

Occasionally, well more realistically once or twice,= someone builds on a project and shared back to me. Denver=E2=80=99s porting= of FDOS over to the bubble is an example. I have really enjoyed the fruits o= f his efforts to have a little file system on a bubble.

I do projects for myself and I would usually wind up= doing a revision or two just to get it to a point where it is somethi= ng I can be proud to have done. At that point I simply share what I have don= e since it is very little extra work. If it sparks a little joy with someone else, great. =

There may be some desire to leave a bit of a legacy a= nd leave something for the younger crowd. However, if it doesn=E2=80=99t hav= e a JTAG interface, for the most part the younger crowd isn=E2=80=99t intere= sted. The vast majority of my YouTube subscribers are over 60. A lot of people who are interested in my projects are actually= trying to get their grandkids interested in old school digital electronics.= The rest of us are just reminiscing, and going back to a period in ou= r lives when this sort of thing made us happy.

I frequently finish something and put it away for a f= ew years before it interests me again. The bubble project is an example. At t= hat point, I am as reliant on my documentation as anyone. More than once I h= ave gone back to watch one of my videos to remind myself how something works.

Having a website is annoying and costs time and mone= y but I can=E2=80=99t think of a better system.

I will say that for the most part my projects are we= ll received and I enjoy that. There are very few nasty comments or people ju= st being mean for no particular reason.

Regards

Craig

On Aug 1, 2023, at 12= :31 PM, Paul Holowko <pholowko@ho= tmail.com> wrote:

=EF=BB=BF Here are my questions about hackaday or Yo= uTube:

About 10 years ago I did this profusely with no resu= lts. A lot of the time the Internet was being over shared and a lot of infor= mation was being put out there. Today, I find that information is scarce and= there is a lot of complete copying and references. What would be the criteria or limits of doing hackada= y?

  I do documentation on all of my projects= with a lot more detail than I would publish on a webpage. And I don=E2=80=99= t want to take care of the website anymore. Is there any money in sell= ing boards of the project?

The only way I could justify writing all that stuff;= if I put it as documentation for myself and other at the same time as publi= shing what I=E2=80=99m doing. Keeping a website or page can be very ti= me consuming. I have so many projects going on here, I think the majority of the people would be interested. And it=E2=80= =99s not only nostalgia projects.

Please give me your thoughts

Sent from my iPhone

On Aug 1, 2023, at 11= :53 AM, SBC-85 <craig@sbc-85.com&= gt; wrote:

=EF=BB=BF

Hi Paul

I had to order some parts to get another bubble boar= d built and haven=E2=80=99t gotten back to that yet.

As if I needed another project, we are doing an addi= tion to our house so that is taking a lot of time too

I am interested in following your core project but I= don=E2=80=99t know when I would be able to build one. Are you going to put o= n hackaday or YouTube or something?

Regards

Craig

On Jul 31, 2023, at 2= :52 PM, Paul Holowko <pholowko@ho= tmail.com> wrote:

=EF=BB=BF

Hi Craig,

I=E2=80=99m sorry I haven=E2=80=99t emailed you late= ly. I have been swamped with trying to get other projects that make money co= mpleted. I=E2=80=99m heading to Indiana for my robot thing with automated sp= rinklers and water moisture sensors. I may work on the bubble memory for a day or so before I leave but it=E2=80=99s gonna be froz= en until after September.

Have you had any chance or any luck with the bubble m= emories from Poland?

Are you interested in keeping up with me on the core= memory? I am also building a high-speed DSP and FFT hardware board and data= collector for animal sounds in a grass field next to a forest from the freq= uency ranges of 20 Hz to 212 KHz. The sound made by the animals in the field and forest indicate what seasons= of animals exist. This is used for determining if the forest or field is ou= t of succession that is possible to grow ginseng. This is what I do in India= na. I=E2=80=99ll save the coefficient of the magnitude of each frequency and is change in time onto a 1 TB hard d= rive that is connected to my embedded processors.

I=E2=80=99ve tried connecting to the gentleman using= the bubble memory. I needed to get an account and something happened. It wa= s hard for me to leave a message.

Sent from my iPhone

On Jul 17, 2023, at 4= :04 PM, craig@sbc-85.com wrote:

=EF=BB=BF

so you are getting the same sequence of 120 bytes an= d then they repeat?

if the number of channels in the block length regist= er were wrong, you would lose bubble data but I do not think the boot loop d= ata would be incorrect and certainly not be just 1/3 of a 120 byte sequence.=

if you are reading the bootloop, then the starting a= ddress of the data read doesn=E2=80=99t matter.

as long as the INIT completes successfully, then the= bootloop is in the FSA. you have already been able to reliably read the boo= tloop from the FSA. so unless there is some intermittent flakeyness in= your circuit or software, I can=E2=80=99t think of what this repeating bootloop data means

From: Paul Holowko <pholowko@hotmail.com>
Sent: Monday, July 17, 2023 3:35 PM
To: craig@sbc-85.com
Subject: Re: Bubble memory questions (finally got boot number)

I keep d= oing an init, add parameters, command "1b" or "B" and it seems to be r= eading different places in memory.. If it do it for three times,= it keeps repeating the same three sets of 40 numbers. Even if I turn off the board and repower it up. The same three sets o= f numbers.

<= /span>

<= /span>

<= /span>

From: craig@sbc-85.com <craig@sbc-85.c= om>
Sent: Monday, July 17, 2023 10:05 PM
To: 'Paul Holowko' <pholowko@hotmail.com>
Subject: RE: Bubble memory questions (finally got boot number)=

yes, that is what I meant. I only have 7110 l= eadless carrier versions built. I had a 7110A(Z) version but I can=E2=80= =99t lay my hands on it for some reason.

From: Paul Holowko <pholowko@hotmail.com>
Sent: Monday, July 17, 2023 2:35 PM
To: craig@sbc-85.com
Subject: Re: Bubble memory questions (finally got boot number)

they a= re AZs

From: craig@sbc-85.com <craig@sbc-85.c= om>
Sent: Monday, July 17, 2023 9:26 PM
To: 'Paul Holowko' <pholowko@hotmail.com>
Subject: RE: Bubble memory questions (finally got boot number)=

indeed, that is a breakthrough.

Turns out that I don=E2=80=99t have a 7110A versio= n of the board so I had to get some parts on order so I can test the Polish b= ubble chips.

regards

craig

From: Paul Holowko <pholowko@hotmail.com>
Sent: Monday, July 17, 2023 8:57 AM
To: craig@sbc-85.com
Subject: Bubble memory questions (finally got boot number)=

Hi Cr= aig,

= ;

Thank= you so much. I just got the first bootloop back from a BMB.= It matched the label on the BMB!!!!! This helps a lot. No= w I'm getting comfortable that the hardware is working. One of the four BMB from Poland worked. The other three had mixed results.&n= bsp; Two would not "init" and the other one that did "init" had the wrong bootloop number. It's tim= e to learn how to put the bootloop number back in. = I also think the connector I'm using for the BMB is too loose. I= find the one that fits tighter works consistently. The fifth BMB I or= dered with some support chips for $75 from Washington "init"s, but the bootloop number is all= wrong.

= ;

When t= he BMB do "init", they give a consistent wrong bootloop number. I'll f= irst get the loose connector to work and check if more will "init". If= the bootloop is wrong, I'll try re-write using the directions

= ;

<image001.png>

= ;

If th= at bombs, then reseed. Need to get one more part and the little board i= s complete. If the seed and bootloop re-write does not work, dissectio= n.

= ;

When I= asked about how slow this device is, I was not asking about read and write s= peeds, but more about the access times for the whole system to read a page o= r so. It really was not a question, but more a comment about the speed of the technology. Old times......=

= ;

I hav= e at least one that works!!!!!!!!!!!!!

= ;

From: craig@sbc-85.com <craig@sbc-85.c= om>
Sent: Sunday, July 16, 2023 11:00 PM
To: 'Paul Holowko' <pholowko@hotmail.com>
Subject: RE: Bubble memory questions

I am looking at this again=E2=80=A6. did fixing t= he signal connection issues resolve the reading bootloop problem (not matchi= ng the device)?

without a bubble installed, you are able to send a= bootloop to the FSA and read that bootloop data back correctly? but with a b= ubble installed you are doing the read but not getting the label data?<= /o:p>

the bootloop should be transferred from the bubbl= e into the FSA during the init command and if you have successfully read the= fake bootloop from the FSA before inserting the bubble this could be a bubb= le problem. is this one of the Polish bubbles? I purchased some of those last month that I have not g= otten around to testing yet so I am not sure of their integrity.

From: Paul Holowko <pholowko@hotmail.com>
Sent: Saturday, July 15, 2023 1:05 PM
To: craig@sbc-85.com
Subject: Re: Bubble memory questions

Hi Craig,

More updates. I can get a consultant bootlo= op map read. It does not match the label on top of the BM. Here is what I=E2= =80=99m getting=E2=80=A6=E2=80=A6.

<image002.jpg>

<= /p>

<image003.jpg>

<image004.jpg>

Sent from my iPhone

<= /p>

On Jul 14, 2023, a= t 3:58 PM, Paul Holowko <pholowko= @hotmail.com> wrote:

=EF=BB=BF Yes, it does write and read boot loop r= egister. It does work and i see the right signals. I=E2=80=99m now writing r= outines that interface with 7220. The BMC is like a over grown sequential st= ate machine. I=E2=80=99m changing gears how I think about writing routines.

I=E2=80=99m finding I have small stupid stuff hap= pening. Like RAC 0F always has the highest bit set one for some reason when I= read the register. I write a 0x55 and get back a 0x95. I had a bad I/O port= on my cpu.

I send the command 0x11 unit and the status comes= back 0x81. I always wait for the busy to go low before another command, exc= ept when fifo is one.

When I read the fifo, I get 0xFF. 0xFF 0x00 0x80 a= nd the rest is zeros

Sent from my iPhone

<= /p>

On Jul 8, 2023, at= 9:12 PM, craig@sbc-85.com wrote:

=EF=BB=BF

with the dummy module installed in place of the 7= 110, can you write and read the bootloop register in the 7242?
that will tell you if you have good communication= between the 7220 and the 7242

From: Paul Holowko <pholowko@hotmail.com>
Sent: Saturday, July 8, 2023 8:55 PM
To: craig@sbc-85.com
Subject: Re: Bubble memory questions

Yes, thank you. I meant 2. But let me double chec= k And yes, I can write and read the fifo. That worked right off the ba= t. And i get 0x41 and at times 42.

Since I have not seen any Swap signals, my wander= ing if I erased the MBM. However, I=E2=80=99m still getting all 0XFF back. L= et me double check on the FSA number.

Here=E2=80=99s the sequence:

Command 1B to set address in rac

Data to rac.BLR LSB. I 0x10
=

BLR MSB. 0x01

0x08

Address. 0x00

0x00

Stuff fifo with 68 bytes

Command 0x13. Page write

0x12. Page read. And I see waveforms on pin 3

Read fifo

Dump to screen.

It comes up all 0xFF

<= /p>

Sent from my iPhone

<= /p>

On Jul 8, 2023, at= 8:24 PM, craig@sbc-85.com wrote:

=EF=BB=BF

Hi Paul,

the first step should be writing to the controlle= r with just the dummy module in place and see if you get back whatever data y= ou write to the FIFO. Are you able to do that so you know that you hav= e communication with the 7220?

then you should make sure that after you populate= the registers that the status value returned shows that the operation has s= uccessfully completed, so the status should be 0x40 usually or maybe 0x41 or= 0x42. you should be able to do that without the bubble or the FSA installed.

when you say you have it configured for 1 FSA, do= you mean 2 FSA channels or did you actually set the parameter for 1 channel= so it is only using two quads inside the bubble?

as for timing between the 7230 and 7242, I have n= ever looked at that. as long as everything is connected properly, I ha= ve not had the need to see what is going on between those two.

From: Paul Holowko <pholowko@hotmail.com>
Sent: Saturday, July 8, 2023 5:26 PM
To: craig@sbc-85.com
Subject: Re: Bubble memory questions

When I write to the BMB, i=E2=80=99m using the 13= command. Or =E2=80=9C3=E2=80=9D. I have set up the BLR for one FSA and for o= ne page. That means I enter in 68 bites of something and then give the three= command. When I do a page read, I get 68 bites of all 0xFF. =E2=80=9C0x12=E2=80=9D I=E2=80=99m assuming this has something to do w= ith my timing not occurring between the 7230 and the 7242. I do see a clock a= nd I/O data going between the 7220 and the 7242.

I do see 12 V pulsing up and down on the coils in= side the BMB

Sent from my iPhone

<= /p>

On Jul 8, 2023, at= 10:35 AM, craig@sbc-85.com wrote:

=EF=BB=BF

You may be interested in his bubble videos also

Magnetic Bubble Memory Storage on a Heathkit H8 - You= Tube

From: Paul Holowko <pholowko@hotmail.com>
Sent: Thursday, July 6, 2023 9:21 PM
To: craig@sbc-85.com
Subject: Re: Bubble memory questions

I took a break today from the BM. Worked on an ai= r filter for smoke and respiratory issues. Lit up a neon sign. Calculated th= e voltage and ratios to produce around 8000 volts. The core is specific for u= p to 200KHz.

<image005.jpg>

<image006.jpg>

<image007.jpg>

<image008.jpg>

Sent from my iPhone

<= /p>

On Jul 6, 2023, at= 8:42 PM, Paul Holowko <pholowko@= hotmail.com> wrote:

=EF=BB=BF Thank yo= u for doing this. It=E2=80=99s really helping. I now understand what y= ou were trying to do. The next question is the reseeding schematic. I=E2=80=99= m confused which socket, I=E2=80=99m assuming on the right, gets all of the connections. Are all the pins between the header and the socket on t= he right?

Sent from my iPhone

<= /p>

On Jul 6, 2023, at= 7:58 PM, craig@sbc-85.com wrote:

=EF=BB=BF

updated user=E2=80=99s manual with pictures of in= tel reseed=E2=80=A6 but that isn=E2=80=99t overly helpful until I build the r= eproduction and update the manual again

From: = craig@sbc-85.com <craig@sbc-85.co= m>
Sent: Thursday, July 6, 2023 7:33 PM
To: 'Paul Holowko' <pholow= ko@hotmail.com>
Subject: RE: Bubble memory questions

I see, thanks for pointing this all out. I f= orgot that I did the layout side by side rather than over-under like the Int= el version. the left side, where it plugs into the bubble board, DIP h= eader pins should be mounted to the bottom, not a normal socket. KiCAD didn=E2=80=99t have one of these so I just= used a socket in the model. I will build one and replace the photogra= phs in the manual. In the mean time, I have updated the manual with ad= ditional description and the reseed instructions as well as a possible part number for the DIP adapter pin. I use these s= ort of adapters from CNC tech available at digikey PN 1175-1524-5-ND

IC Sockets Products | IC Soc= ket Adapters (cnctech.us)

let me get back to you on the page writing

From: Paul Holowko <pholowko@hotmail.com>
Sent: Thursday, July 6, 2023 6:42 PM
To: SBC-85 <craig@sbc-85.com>
Subject: Re: Bubble memory questions

=EF=BB=BF

Yes,= I have the instructions. My confusion is around the layout of the res= eeding board. The Intel reseed board seems different than the one you m= ade. Two sockets vs. one socket.

&nbs= p;

I am= also confused on page writing. I understand each page is 40 bytes, but how d= o multi pages? I=E2=80=99m still figuring out the 68 thing=

&nbs= p;

&nbs= p;

&nbs= p;

&nbs= p;

From: SBC-85 <craig@sbc-85.com>
Sent: Thursday, July 6, 2023 5:59 PM
To: Paul Holowko <p= holowko@hotmail.com>
Subject: Re: Bubble memory questions

Do you have the Intel instructions on using the r= eseed board? I have not reseeded in many years and have forgotten the d= etails.

I can scan the instructions and send to you if yo= u do not have them already.

I am out today, so tonight or tomorrow =

<= /p>

On Jul 5, 2023, at= 9:50 PM, Paul Holowko <pholowko@= hotmail.com> wrote:

=EF=BB=BF I would l= ove the pictures. I need to see how the 7230 is plugged in your board and th= en how is it plugged into the memory board. I have tried to find pictu= res of it on the internet, but the internet is becoming obsolete.

Sent from my iPhone

<= /p>

On Jul 5, 2023, at= 8:04 PM, SBC-85 <craig@sbc-85.com> wrote:

=EF=BB=BF

Hi Paul,

That is unfortunate.

Read and write cycles are 4 clock cycles plus som= e change. Figure 5 clock cycles to be safe, so 1250 ns total cycle tim= e.

I will send pics of my reseed module, hopefully t= omorrow. I only have the one that comes with the intel BPK engineering= kit. I made my reproduction ones from reverse engineering that one. I= t is possible that there is a mistake on the reseed module.

Regards

Craig

<= /p>

On Jul 4, 2023, at= 10:48 PM, Paul Holowko <pholowko= @hotmail.com> wrote:

=EF=BB=BF

=EF=BB=BF

I think I made a mistake. The bubble is a AZ vers= ion and I did not lift up pin 13. It looks like the whole MBM is erased. I=E2= =80=99m fairy sure the boot number is gone. The timing error flag reports 1 a= ll the time.

How fast does the BMC execute commands? It=E2= =80=99s at 4MHz, but my CPU is at 48 MHz. :-/

I=E2=80=99m making OS commands that are command s= cripts for the BMC. These will turn into commands triggered by hardware from= the the backplane connection.

Can you please send me a real picture of your see= ding board with parts. I=E2=80=99m a bit confused.

I=E2=80=99m combing the manuals and bit by bit le= arning details about the BM. It just takes time.

Sent from my iPhone

<= /p>

On Jul 1, 2023, at= 4:49 AM, Paul Holowko <pholowko@= hotmail.com> wrote:

=EF=BB=BF Hi Craig,

The whole SN75463 business looks like it was desi= gned by a committee. I=E2=80=99m guessing it does not work on my board becau= se there is a juicy inverter from your RESET. I was trying to avoid le= arning the circuit; well, too late. It must have been designed by ex-HAM radio operators. Who uses 914s other then core= memory or crystal radios? Lol.

The interface is designed from scratch. It=E2=80=99= s an old architecture used inside the 4040 and 4004. I find computers/CPUs a= re not good at math or calculations, but rather moving data around. Hence, c= ore memory needs to have stuff done to it for it to stock pile data. The same goes for bubble and flash. The= board on the left directly connects the 7220 fifo to the back plane connect= or; chips are not populated, yet. The CPU on that board bit-bangs the 7220 R= D signals and handles data traffic.

The original plan is to use the bubble memory as a= really slow NVRAM where it stored tokens/symbols for an embedded compiler b= etween OP codes and micro-codes. The core memory would be a stack and intern= al regulators. Then build another compiler between OP codes and some form of computer language like C. Hence t= he running 1970s and 1980s joke, YACC. I=E2=80=99ve done this for my embedde= d composting machines.

I need all of the data storage devices to talk in= the same way to each other. The common denominator appears to be Address an= d Data lines with RD and WR signals. The microcode is saved In EEPROMs where= the output data are the control signals for the whole backplane system. Data and program are mixed on= a hardware level. It=E2=80=99s kind of C++ meets RISC.
=

This makes it possibl= e to run an FFT, solve differential equations or factor Taylor Series o= perations on an OP code/microcode level.

I=E2=80=99m putting I2C FRAM in the system too. L= et=E2=80=99s face it, the whole system made with three different irons. &nbs= p;Sounds like a Julia Child recipe. Lol

Paul

Sent from my iPhone

<= /p>

On Jun 30, 2023, a= t 9:00 PM, SBC-85 <craig@sbc-85.com> wrote:

=EF=BB=BF

=EF=BB=BF

Hi Paul,

Sorry I didn=E2=80=99t get back to you. When the w= eather is nice I am not at home much.

Pretty exciting that you have the board up, there= is just something about using these things. Much like your core proje= cts. I have thought about doing something with core memory, but I really don= 't have a particular fondness for it like I do bubble.

On my circuit, the 75463 output is pulled up and b= iased via R17, CR1, and R8. I think I lifted that from intel, it doesn= =E2=80=99t look like my style.

So your bubble board is from scratch? I would gue= ss that there may be some people interested in it because it uses a straight= forward connector like Intel=E2=80=99s original bubble kit making it easier t= o hang on other projects (easier than my finger connector on my SBC-85 board). I think there would also be p= eople interested if you did a hackaday or YouTube video also.
=

I am out this weekend and next week depends on wh= ether if I am back at home working on electronics.

Congratulations on your success, I hope working t= he wires for the cores doesn=E2=80=99t make you too cross-eyed

Craig

<= /p>

On Jun 30, 2023, a= t 8:39 PM, Paul Holowko <pholowko= @hotmail.com> wrote:

=EF=BB=BF Just wanted to let you know the bubble m= emory board is powered and I spent this afternoon building the OS to talk wi= th the BMC. Your samples and explanations really helped.

I used your circuits for the power down enable. T= he RC does not work out too well with the 2 ms delay. And I had trouble with= SN75463. It seems to need pull-ups since it=E2=80=99s open collector.=

<image0.jpeg>

<image1.jpeg>

The board on the left is a PIC18F4550. It talks through USB to the computer.= I guess this can be a 1 Meg byte memory stick. Lol. The interface is one 74= act245 between the 7220 and the PIC. The board on the left connects into a b= ack plane.

I was thinking about using it on the farm, but it= draws too much power. Just chips powered with out memory bubbling, it=E2=80= =99s 1/4 amp.

It wouldn=E2=80=99t be hard to get this to work w= ith configuration memory for some independent project. Currently I=E2=80=99m= using I2C FRAM. Not sure what to do with it. It is fun to build. = ;

Thanks for listening. I=E2=80=99m off to put toge= ther some core memory.

Sent from my iPhone

<= /p>

On Jun 27, 2023, a= t 10:48 AM, Paul Holowko <pholowk= o@hotmail.com> wrote:

=EF=BB=BF

Hi C= raig,

&nbs= p;

Than= ks for helping with the registration. I never got a registration e= mail. Can you please send a link where you are logging in? I'm a= lso getting a few 404 pages. I used to have webpages, but I gave that up. Currently, I'm automating a wasabi farm in Muncie= Indiana. We grow Wasabi by geothermal, wind and solar. It's tot= ally off the bridge. The local University has their EE and Computer EE= Juniors and Seniors over for a 2 hour lecture every time I'm there.

&nbs= p;

No, t= he board is not running with a CPU, but has been powered up for finding shor= ts and stupid things. The CPU boards come tomorrow and I'll stu= ff it right away. I hope there aren't too many problems getting is up and running. I'm more worried about bad c= hips. I have all of the parts so far. And I have plans for this b= ubble memory. Later......

&nbs= p;

The c= ore boards are from a PDP-8. I'm making the drivers from scratch. = ; I have the H-bridges going, but the core "fabric" is a little bit damaged f= rom removal or by age through the years. The PDP-8 cores are stacked together, so one driver runs all of the X and Y= for all the bits in a byte. I'm using the inhibit for making zeros.&n= bsp; It's been difficult to find information on this subject anymore on the i= nternet. The internet is getting more broken daily. I'm running the board at 2MHz on a countdown one-hot-st= ate-machine, because it's easier to read the "blup" when the X and Y have a s= taggered rising edge. A lot of this I'm making up as I go along. =

&nbs= p;

Abou= t the seeding board, because of my lack of experience with bubble memory, ar= e all of the pins between the two sockets connected, except for the changes w= ith the 2N4013? I don't understand exactly how the bubble reservoir is made. However, I found the comman= ds and processes needed to get it going.

&nbs= p;

I lo= ve your style of teaching. It's the same as mine. lol &nbs= p;I teach in the same fashion. However, I never found the video descri= bing how seeding is done. It's mentioned at the end or one of your videos, but I think you may never made it.

&nbs= p;

Paul=

&nbs= p;

From: SBC-85 <craig@sbc-85.com>
Sent: Tuesday, June 27, 2023 4:28 PM
To: Paul Holowko <p= holowko@hotmail.com>
Subject: Re: Your new user activation webpage is broken <= /o:p>

Hi Paul,

I completed a test registration yesterday and it d= id the same but it actually registered. I think I just need to add a. =E2= =80=9CThank yo7=E2=80=9D page. But the activation email worked at leas= t.

I am always interested in people using bubbles or= that have offshoots of some of my projects.

Have you gotten the bubble board up and running w= ith your micro code computer? Are you building the core and drivers from scr= atch or did you find some old core boards?

Regards

Craig

<= /p>

On Jun 27, 2023, a= t 6:18 AM, Paul Holowko <pholowko= @hotmail.com> wrote:

=EF=BB=BF No, it goes to the same page for login a= nd says no errors.

BtY, I just completed laying out and stuffing a 1= Meg bubble memory board. I=E2=80=99m using it for a micro code computer. In= addition Im putting together a stack of 4096 core memory X 8. I don=E2=80=99= t know if you have an interest in adding that to your website or even storing up conversations

<= /p>

Sent from my iPhone

<= /p>

On Jun 26, 2023, a= t 5:16 PM, craig@sbc-85.com wrote:

=EF=BB=BF

Hi Paul

I have still not been able to figure out this p= roblem, but I was able to manually activate your account. lets see if t= hat works. let me know if you still see a problem (or if there is anyt= hing specifically you are looking for).

regards

craig

From: Paul Holowko <pholowko@hotmail.com>
Sent: Saturday, April 8, 2023 8:37 AM
To: 052922@SBC-85.COM
Subject: Your new user activation webpage is broken