Return-Path: <craig@sbc-85.com>
Delivered-To: craig@sbc-85.com
Received: from gator4254.hostgator.com
	by gator4254.hostgator.com with LMTP
	id sNfmLI8MEWUqKgsAcizydQ
	(envelope-from <craig@sbc-85.com>)
	for <craig@sbc-85.com>; Sun, 24 Sep 2023 23:29:03 -0500
Return-path: <craig@sbc-85.com>
Envelope-to: craig@sbc-85.com
Delivery-date: Sun, 24 Sep 2023 23:29:03 -0500
Received: from c-24-20-253-210.hsd1.wa.comcast.net ([24.20.253.210]:53221 helo=smtpclient.apple)
	by gator4254.hostgator.com with esmtpa (Exim 4.96)
	(envelope-from <craig@sbc-85.com>)
	id 1qkdDT-0035Ko-1b;
	Sun, 24 Sep 2023 23:29:03 -0500
Content-Type: multipart/alternative; boundary=Apple-Mail-4509C71D-2C9D-4BEA-B36E-B53517D7EE1F
Content-Transfer-Encoding: 7bit
From: SBC-85 <craig@sbc-85.com>
Mime-Version: 1.0 (1.0)
Subject: Re: intel 2113 RAMs
Message-Id: <AA600483-0C64-4318-9120-2CA641E92F1F@sbc-85.com>
References: <CAEm70ZXoLcA491wx7wNXcFJ9nkgc5B_EOd0FwWVq8-4sM=_DRQ@mail.gmail.com>
In-Reply-To: <CAEm70ZXoLcA491wx7wNXcFJ9nkgc5B_EOd0FwWVq8-4sM=_DRQ@mail.gmail.com>
To: John Culver <john@cpushack.com>
Date: Sun, 24 Sep 2023 21:28:52 -0700
X-Mailer: iPhone Mail (21A350)


--Apple-Mail-4509C71D-2C9D-4BEA-B36E-B53517D7EE1F
Content-Type: text/html;
	charset=utf-8
Content-Transfer-Encoding: quoted-printable

<html><head><meta http-equiv=3D"content-type" content=3D"text/html; charset=3D=
utf-8"></head><body dir=3D"auto"><div dir=3D"ltr"></div><div dir=3D"ltr">Thi=
s one has just one stuck bit on the bad side.&nbsp;</div><div dir=3D"ltr"><b=
r><blockquote type=3D"cite">On Sep 24, 2023, at 9:12=E2=80=AFPM, John Culver=
 &lt;john@cpushack.com&gt; wrote:<br><br></blockquote></div><blockquote type=
=3D"cite"><div dir=3D"ltr">=EF=BB=BF<div dir=3D"ltr">I didnt, I probably got=
 them off a board, so dates likely the same, I dont have a system to test th=
em in though<br clear=3D"all"><div><div dir=3D"ltr" class=3D"gmail_signature=
" data-smartmail=3D"gmail_signature">John Culver<br>Curator<br>The CPU Shack=
 Museum<br><a href=3D"mailto:john@cpushack.com" target=3D"_blank">john@cpush=
ack.com</a><br><a href=3D"http://www.cpushack.com" target=3D"_blank">www.cpu=
shack.com</a></div></div><br></div><br><div class=3D"gmail_quote"><div dir=3D=
"ltr" class=3D"gmail_attr">On Sun, Sep 24, 2023 at 6:21=E2=80=AFPM &lt;<a hr=
ef=3D"mailto:craig@sbc-85.com">craig@sbc-85.com</a>&gt; wrote:<br></div><blo=
ckquote class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left:=
1px solid rgb(204,204,204);padding-left:1ex"><div class=3D"msg14404501274734=
02032"><div lang=3D"EN-US" style=3D"overflow-wrap: break-word;"><div class=3D=
"m_1440450127473402032WordSection1"><p class=3D"MsoNormal">Hi John, <u></u><=
u></u></p><p class=3D"MsoNormal">Did you happen to get the date codes of all=
 the ones you had? And did you happen to actually test any of them on the =E2=
=80=98bad=E2=80=99 half?<u></u><u></u></p><p class=3D"MsoNormal"><u></u>&nbs=
p;<u></u></p><p class=3D"MsoNormal">Regards<u></u><u></u></p><p class=3D"Mso=
Normal">craig<u></u><u></u></p><p class=3D"MsoNormal"><u></u>&nbsp;<u></u></=
p><div style=3D"border-right:none;border-bottom:none;border-left:none;border=
-top:1pt solid rgb(225,225,225);padding:3pt 0in 0in"><p class=3D"MsoNormal">=
<b>From:</b> John Culver &lt;<a href=3D"mailto:john@cpushack.com" target=3D"=
_blank">john@cpushack.com</a>&gt; <br><b>Sent:</b> Tuesday, September 19, 20=
23 7:59 PM<br><b>To:</b> <a href=3D"mailto:craig@sbc-85.com" target=3D"_blan=
k">craig@sbc-85.com</a><br><b>Subject:</b> Re: intel 2113 RAMs<u></u><u></u>=
</p></div><p class=3D"MsoNormal"><u></u>&nbsp;<u></u></p><div><p class=3D"Ms=
oNormal">Shipped:&nbsp;92001903332000300005540807<br clear=3D"all"><u></u><u=
></u></p><div><div><p class=3D"MsoNormal">John Culver<br>Curator<br>The CPU S=
hack Museum<br><a href=3D"mailto:john@cpushack.com" target=3D"_blank">john@c=
pushack.com</a><br><a href=3D"http://www.cpushack.com" target=3D"_blank">www=
.cpushack.com</a><u></u><u></u></p></div></div><p class=3D"MsoNormal"><u></u=
>&nbsp;<u></u></p></div><p class=3D"MsoNormal"><u></u>&nbsp;<u></u></p><div>=
<div><p class=3D"MsoNormal">On Tue, Sep 19, 2023 at 11:00=E2=80=AFAM &lt;<a h=
ref=3D"mailto:craig@sbc-85.com" target=3D"_blank">craig@sbc-85.com</a>&gt; w=
rote:<u></u><u></u></p></div><blockquote style=3D"border-top:none;border-rig=
ht:none;border-bottom:none;border-left:1pt solid rgb(204,204,204);padding:0i=
n 0in 0in 6pt;margin-left:4.8pt;margin-right:0in"><div><div><div><p class=3D=
"MsoNormal">Done. Thanks.<u></u><u></u></p><p class=3D"MsoNormal">&nbsp;<u><=
/u><u></u></p><div style=3D"border-right:none;border-bottom:none;border-left=
:none;border-top:1pt solid rgb(225,225,225);padding:3pt 0in 0in"><p class=3D=
"MsoNormal"><b>From:</b> John Culver &lt;<a href=3D"mailto:john@cpushack.com=
" target=3D"_blank">john@cpushack.com</a>&gt; <br><b>Sent:</b> Tuesday, Sept=
ember 19, 2023 9:39 AM<br><b>To:</b> SBC-85 &lt;<a href=3D"mailto:craig@sbc-=
85.com" target=3D"_blank">craig@sbc-85.com</a>&gt;<br><b>Subject:</b> Re: in=
tel 2113 RAMs<u></u><u></u></p></div><p class=3D"MsoNormal">&nbsp;<u></u><u>=
</u></p><div><p class=3D"MsoNormal">$14 to <a href=3D"mailto:john@cpushack.c=
om" target=3D"_blank">john@cpushack.com</a><br clear=3D"all"><u></u><u></u><=
/p><div><div><p class=3D"MsoNormal">John Culver<br>Curator<br>The CPU Shack M=
useum<br><a href=3D"mailto:john@cpushack.com" target=3D"_blank">john@cpushac=
k.com</a><br><a href=3D"http://www.cpushack.com" target=3D"_blank">www.cpush=
ack.com</a><u></u><u></u></p></div></div><p class=3D"MsoNormal">&nbsp;<u></u=
><u></u></p></div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p><div><div><=
p class=3D"MsoNormal">On Mon, Sep 18, 2023 at 10:46=E2=80=AFPM SBC-85 &lt;<a=
 href=3D"mailto:craig@sbc-85.com" target=3D"_blank">craig@sbc-85.com</a>&gt;=
 wrote:<u></u><u></u></p></div><blockquote style=3D"border-top:none;border-r=
ight:none;border-bottom:none;border-left:1pt solid rgb(204,204,204);padding:=
0in 0in 0in 6pt;margin:5pt 0in 5pt 4.8pt"><div><div><p class=3D"MsoNormal">I=
 noticed that later when I went back to your site.&nbsp; I should take it an=
yway because I don=E2=80=99t know which flavor I will find enough of first.<=
u></u><u></u></p></div><div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p><=
/div><div><p class=3D"MsoNormal">Let me know the total and your PayPal.<u></=
u><u></u></p></div><div><p class=3D"MsoNormal">Thanks<u></u><u></u></p></div=
><div><p class=3D"MsoNormal">Craig<u></u><u></u></p></div><div><p class=3D"M=
soNormal" style=3D"margin-bottom:12pt"><u></u>&nbsp;<u></u></p><blockquote s=
tyle=3D"margin-top:5pt;margin-bottom:5pt"><p class=3D"MsoNormal" style=3D"ma=
rgin-bottom:12pt">On Sep 18, 2023, at 9:58 PM, John Culver &lt;<a href=3D"ma=
ilto:john@cpushack.com" target=3D"_blank">john@cpushack.com</a>&gt; wrote:<u=
></u><u></u></p></blockquote></div><blockquote style=3D"margin-top:5pt;margi=
n-bottom:5pt"><div><p class=3D"MsoNormal">=EF=BB=BF<u></u><u></u></p><div><p=
 class=3D"MsoNormal">The standard production one I have is A0L (the ES ones w=
ere A0H)<u></u><u></u></p><div><p class=3D"MsoNormal"><br clear=3D"all"><u><=
/u><u></u></p><div><div><p class=3D"MsoNormal">John Culver<br>Curator<br>The=
 CPU Shack Museum<br><a href=3D"mailto:john@cpushack.com" target=3D"_blank">=
john@cpushack.com</a><br><a href=3D"http://www.cpushack.com" target=3D"_blan=
k">www.cpushack.com</a><u></u><u></u></p></div></div><p class=3D"MsoNormal">=
&nbsp;<u></u><u></u></p></div></div><p class=3D"MsoNormal">&nbsp;<u></u><u><=
/u></p><div><div><p class=3D"MsoNormal">On Sun, Sep 17, 2023 at 11:45=E2=80=AF=
AM SBC-85 &lt;<a href=3D"mailto:craig@sbc-85.com" target=3D"_blank">craig@sb=
c-85.com</a>&gt; wrote:<u></u><u></u></p></div><blockquote style=3D"border-t=
op:none;border-right:none;border-bottom:none;border-left:1pt solid rgb(204,2=
04,204);padding:0in 0in 0in 6pt;margin:5pt 0in 5pt 4.8pt"><div><div><p class=
=3D"MsoNormal">I am just rounding them up so can use either one but will sti=
ck with AOH since they seem to be more prevalent.&nbsp; Whatever yield probl=
em intel was having must have been in the low half. Have you noticed that or=
 did I just accidentally start a rumor?<u></u><u></u></p></div><div><p class=
=3D"MsoNormal">&nbsp;<u></u><u></u></p></div><div><p class=3D"MsoNormal">I w=
ill take the one standard production AOH you have.&nbsp;<u></u><u></u></p></=
div><div><p class=3D"MsoNormal" style=3D"margin-bottom:12pt"><u></u>&nbsp;<u=
></u></p><blockquote style=3D"margin-top:5pt;margin-bottom:5pt"><p class=3D"=
MsoNormal" style=3D"margin-bottom:12pt">On Sep 17, 2023, at 10:28 AM, John C=
ulver &lt;<a href=3D"mailto:john@cpushack.com" target=3D"_blank">john@cpusha=
ck.com</a>&gt; wrote:<u></u><u></u></p></blockquote></div><blockquote style=3D=
"margin-top:5pt;margin-bottom:5pt"><div><p class=3D"MsoNormal">=EF=BB=BF<u><=
/u><u></u></p><div><p class=3D"MsoNormal">I have 2 Engineering Samples as we=
ll, but the are the opposite set up (A0H vs A0L) and kinda spendy<u></u><u><=
/u></p><div><div><div><p class=3D"MsoNormal">John Culver<br>Curator<br>The C=
PU Shack Museum<br><a href=3D"mailto:john@cpushack.com" target=3D"_blank">jo=
hn@cpushack.com</a><br><a href=3D"http://www.cpushack.com" target=3D"_blank"=
>www.cpushack.com</a><u></u><u></u></p></div></div><p class=3D"MsoNormal">&n=
bsp;<u></u><u></u></p></div></div><p class=3D"MsoNormal">&nbsp;<u></u><u></u=
></p><div><div><p class=3D"MsoNormal">On Sat, Sep 16, 2023 at 3:40=E2=80=AFP=
M &lt;<a href=3D"mailto:craig@sbc-85.com" target=3D"_blank">craig@sbc-85.com=
</a>&gt; wrote:<u></u><u></u></p></div><blockquote style=3D"border-top:none;=
border-right:none;border-bottom:none;border-left:1pt solid rgb(204,204,204);=
padding:0in 0in 0in 6pt;margin:5pt 0in 5pt 4.8pt"><div><div><div><p class=3D=
"MsoNormal">Hi John,<u></u><u></u></p><p class=3D"MsoNormal">&nbsp;<u></u><u=
></u></p><p class=3D"MsoNormal">I need some intel 2113 SRAMs.&nbsp; qty 4 to=
 get a board populated.&nbsp; I see you have one listed, that is all you hav=
e available?<u></u><u></u></p><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p=
><div style=3D"border-right:none;border-bottom:none;border-left:none;border-=
top:1pt solid rgb(225,225,225);padding:3pt 0in 0in"><p class=3D"MsoNormal"><=
b>From:</b> John Culver &lt;<a href=3D"mailto:john@cpushack.com" target=3D"_=
blank">john@cpushack.com</a>&gt; <br><b>Sent:</b> Saturday, February 4, 2023=
 7:30 AM<br><b>To:</b> SBC-85 &lt;<a href=3D"mailto:craig@sbc-85.com" target=
=3D"_blank">craig@sbc-85.com</a>&gt;<br><b>Subject:</b> Re: MCS-8 tester<u><=
/u><u></u></p></div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p><div><p c=
lass=3D"MsoNormal">yaah, I keep some in stock if needed<br clear=3D"all"><u>=
</u><u></u></p><div><div><p class=3D"MsoNormal">John Culver<br>Curator<br>Th=
e CPU Shack Museum<br><a href=3D"mailto:john@cpushack.com" target=3D"_blank"=
>john@cpushack.com</a><br><a href=3D"http://www.cpushack.com" target=3D"_bla=
nk">www.cpushack.com</a><u></u><u></u></p></div></div><p class=3D"MsoNormal"=
>&nbsp;<u></u><u></u></p></div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></=
p><div><div><p class=3D"MsoNormal">On Sat, Feb 4, 2023 at 1:36 AM SBC-85 &lt=
;<a href=3D"mailto:craig@sbc-85.com" target=3D"_blank">craig@sbc-85.com</a>&=
gt; wrote:<u></u><u></u></p></div><blockquote style=3D"border-top:none;borde=
r-right:none;border-bottom:none;border-left:1pt solid rgb(204,204,204);paddi=
ng:0in 0in 0in 6pt;margin:5pt 0in 5pt 4.8pt"><div><div><p class=3D"MsoNormal=
">Yes, it would be good to have a tester. The 4289s are hard to come by also=
 unless you have a supplier.<u></u><u></u></p></div><div><p class=3D"MsoNorm=
al" style=3D"margin-bottom:12pt">&nbsp;<u></u><u></u></p><blockquote style=3D=
"margin-top:5pt;margin-bottom:5pt"><p class=3D"MsoNormal" style=3D"margin-bo=
ttom:12pt">On Feb 4, 2023, at 12:10 AM, John Culver &lt;<a href=3D"mailto:jo=
hn@cpushack.com" target=3D"_blank">john@cpushack.com</a>&gt; wrote:<u></u><u=
></u></p></blockquote></div><blockquote style=3D"margin-top:5pt;margin-botto=
m:5pt"><div><p class=3D"MsoNormal">=EF=BB=BF<u></u><u></u></p><div><p class=3D=
"MsoNormal">It does not unfortunately, it used a 4289, which was the replace=
ment for the 4008/4009<u></u><u></u></p><div><p class=3D"MsoNormal">I dont h=
ave a good way to test them, though seems maybe be good to make one<br clear=
=3D"all"><u></u><u></u></p><div><div><p class=3D"MsoNormal">John Culver<br>C=
urator<br>The CPU Shack Museum<br><a href=3D"mailto:john@cpushack.com" targe=
t=3D"_blank">john@cpushack.com</a><br><a href=3D"http://www.cpushack.com" ta=
rget=3D"_blank">www.cpushack.com</a><u></u><u></u></p></div></div><p class=3D=
"MsoNormal">&nbsp;<u></u><u></u></p></div></div><p class=3D"MsoNormal">&nbsp=
;<u></u><u></u></p><div><div><p class=3D"MsoNormal">On Fri, Feb 3, 2023 at 1=
0:41 PM SBC-85 &lt;<a href=3D"mailto:craig@sbc-85.com" target=3D"_blank">cra=
ig@sbc-85.com</a>&gt; wrote:<u></u><u></u></p></div><blockquote style=3D"bor=
der-top:none;border-right:none;border-bottom:none;border-left:1pt solid rgb(=
204,204,204);padding:0in 0in 0in 6pt;margin:5pt 0in 5pt 4.8pt"><div><div><p c=
lass=3D"MsoNormal">Hi John,<u></u><u></u></p></div><div><p class=3D"MsoNorma=
l">Can your MCS-4 tester test the 4008 and 4009? Or do you have a good way t=
o test them?<u></u><u></u></p></div><div><p class=3D"MsoNormal">&nbsp;<u></u=
><u></u></p></div><div><p class=3D"MsoNormal">Regards<u></u><u></u></p></div=
><div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p></div><div><p class=3D"=
MsoNormal">Craig<u></u><u></u></p></div><div><p class=3D"MsoNormal" style=3D=
"margin-bottom:12pt">&nbsp;<u></u><u></u></p><blockquote style=3D"margin-top=
:5pt;margin-bottom:5pt"><p class=3D"MsoNormal" style=3D"margin-bottom:12pt">=
On Sep 26, 2022, at 12:13 PM, John Culver &lt;<a href=3D"mailto:john@cpushac=
k.com" target=3D"_blank">john@cpushack.com</a>&gt; wrote:<u></u><u></u></p><=
/blockquote></div><blockquote style=3D"margin-top:5pt;margin-bottom:5pt"><di=
v><p class=3D"MsoNormal">=EF=BB=BF<u></u><u></u></p><div><p class=3D"MsoNorm=
al">In the tester the CPU S2 output is only connected to an input pin of the=
 GAL22V10. The GAL is CMOS technology and the input has an internal pull up,=
 so it's not a heavy load.<br>I do not think my tester would detect this pro=
blem unfortunately<br clear=3D"all"><u></u><u></u></p><div><div><p class=3D"=
MsoNormal">John Culver<br>Curator<br>The CPU Shack Museum<br><a href=3D"mail=
to:john@cpushack.com" target=3D"_blank">john@cpushack.com</a><br><a href=3D"=
http://www.cpushack.com" target=3D"_blank">www.cpushack.com</a><u></u><u></u=
></p></div></div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p></div><p cla=
ss=3D"MsoNormal">&nbsp;<u></u><u></u></p><div><div><p class=3D"MsoNormal">On=
 Fri, Sep 23, 2022 at 5:07 PM &lt;<a href=3D"mailto:craig@sbc-85.com" target=
=3D"_blank">craig@sbc-85.com</a>&gt; wrote:<u></u><u></u></p></div><blockquo=
te style=3D"border-top:none;border-right:none;border-bottom:none;border-left=
:1pt solid rgb(204,204,204);padding:0in 0in 0in 6pt;margin:5pt 0in 5pt 4.8pt=
"><div><div><div><p class=3D"MsoNormal">Hi John,<u></u><u></u></p><p class=3D=
"MsoNormal">&nbsp;<u></u><u></u></p><p class=3D"MsoNormal">One of my current=
 projects is a reproduction intellect 8 board set.&nbsp; I have to use my MI=
L MOD8 to see if my 8008 CPUs are good and I just came across one that worke=
d OK in the MIL MOD8 but is flakey in my intellect 8.&nbsp; It turns out the=
 S2 output is weak so sometimes the 8008 has trouble generating a T1I state a=
nd coming out of interrupt.<u></u><u></u></p><p class=3D"MsoNormal">&nbsp;<u=
></u><u></u></p><p class=3D"MsoNormal">how thoroughly does your MCS-8 board t=
est outputs?&nbsp; would it catch this sort of problem with a marginal outpu=
t pin?&nbsp; if so, I think I need one.<u></u><u></u></p><p class=3D"MsoNorm=
al">&nbsp;<u></u><u></u></p><p class=3D"MsoNormal">regards<u></u><u></u></p>=
<p class=3D"MsoNormal">&nbsp;<u></u><u></u></p><p class=3D"MsoNormal">craig<=
u></u><u></u></p><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p><div style=3D=
"border-right:none;border-bottom:none;border-left:none;border-top:1pt solid r=
gb(225,225,225);padding:3pt 0in 0in"><p class=3D"MsoNormal"><b>From:</b> Joh=
n Culver &lt;<a href=3D"mailto:john@cpushack.com" target=3D"_blank">john@cpu=
shack.com</a>&gt; <br><b>Sent:</b> Tuesday, July 5, 2022 9:42 AM<br><b>To:</=
b> SBC-85 &lt;<a href=3D"mailto:craig@sbc-85.com" target=3D"_blank">craig@sb=
c-85.com</a>&gt;<br><b>Subject:</b> Re: Bubble kits<u></u><u></u></p></div><=
p class=3D"MsoNormal">&nbsp;<u></u><u></u></p><div><p class=3D"MsoNormal">yu=
p all good,<u></u><u></u></p><div><p class=3D"MsoNormal">Intel didnt&nbsp;'m=
ake' many 2704s and I havent seen one that isnt a 2708 die, I really doubt t=
hey MADE a separate die for one, and likely only made the 2704 to deal with l=
ower then wanted yields of the 2708 die<u></u><u></u></p></div><div><p class=
=3D"MsoNormal">There wasnt a huge marker for a 4k EPROM, and not many others=
 mae them (Intersil/Harris did but in different configurations)<u></u><u></u=
></p></div><div><p class=3D"MsoNormal"><br clear=3D"all"><u></u><u></u></p><=
div><div><p class=3D"MsoNormal">John Culver<br>Curator<br>The CPU Shack Muse=
um<br><a href=3D"mailto:john@cpushack.com" target=3D"_blank">john@cpushack.c=
om</a><br><a href=3D"http://www.cpushack.com" target=3D"_blank">www.cpushack=
.com</a><u></u><u></u></p></div></div><p class=3D"MsoNormal">&nbsp;<u></u><u=
></u></p></div></div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p><div><di=
v><p class=3D"MsoNormal">On Tue, Jul 5, 2022 at 2:19 AM SBC-85 &lt;<a href=3D=
"mailto:craig@sbc-85.com" target=3D"_blank">craig@sbc-85.com</a>&gt; wrote:<=
u></u><u></u></p></div><blockquote style=3D"border-top:none;border-right:non=
e;border-bottom:none;border-left:1pt solid rgb(204,204,204);padding:0in 0in 0=
in 6pt;margin:5pt 0in 5pt 4.8pt"><div><div><p class=3D"MsoNormal">Hi John<u>=
</u><u></u></p></div><div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p></d=
iv><div><p class=3D"MsoNormal">Thanks for the feedback on tindie, I hope you=
 are having fun with the bubbles<u></u><u></u></p></div><div><p class=3D"Mso=
Normal">&nbsp;<u></u><u></u></p></div><div><p class=3D"MsoNormal">Quick ques=
tion.=E2=80=94Have you ever seen an intel 2704 that wasn=E2=80=99t actually a=
 2708 die?&nbsp; Did intel ever make a 2704 die do you think?<u></u><u></u><=
/p></div><div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p></div><div><p c=
lass=3D"MsoNormal">&nbsp;<u></u><u></u></p></div><div><p class=3D"MsoNormal"=
>Regards<u></u><u></u></p></div><div><p class=3D"MsoNormal">&nbsp;<u></u><u>=
</u></p></div><div><p class=3D"MsoNormal">Craig<u></u><u></u></p></div><div>=
<p class=3D"MsoNormal">&nbsp;<u></u><u></u></p></div><div><p class=3D"MsoNor=
mal">&nbsp;<u></u><u></u></p></div><div><p class=3D"MsoNormal" style=3D"marg=
in-bottom:12pt">&nbsp;<u></u><u></u></p><blockquote style=3D"margin-top:5pt;=
margin-bottom:5pt"><p class=3D"MsoNormal" style=3D"margin-bottom:12pt">On Ju=
n 20, 2022, at 11:40 AM, John Culver &lt;<a href=3D"mailto:john@cpushack.com=
" target=3D"_blank">john@cpushack.com</a>&gt; wrote:<u></u><u></u></p></bloc=
kquote></div><blockquote style=3D"margin-top:5pt;margin-bottom:5pt"><div><p c=
lass=3D"MsoNormal">=EF=BB=BF<u></u><u></u></p><div><p class=3D"MsoNormal">Yu=
p came in good condition<u></u><u></u></p><div><p class=3D"MsoNormal">all 5 o=
f them had memtech branded 7110s (was half expecting an Intel to show up in o=
ne of them haha)<u></u><u></u></p></div><div><p class=3D"MsoNormal">The scop=
e I have works well for analysis but I dont have a camera set up for it unfo=
rtunately<u></u><u></u></p></div><div><p class=3D"MsoNormal">I'll have to fi=
gure out feedback on tindie lol was my first time using it<u></u><u></u></p>=
</div><div><p class=3D"MsoNormal">the 3870 is a neat chips, I should write s=
omething on it sometime, pretty much a Microcontroller version of the F8, an=
d they made a UV-EPROM based one too.&nbsp; the 3870 turned out to be very p=
opular in Euro telecoms, being made by Telefunken a lot (and tons by Mostek/=
SGS too)<br clear=3D"all"><u></u><u></u></p><div><div><p class=3D"MsoNormal"=
>John Culver<br>Curator<br>The CPU Shack Museum<br><a href=3D"mailto:john@cp=
ushack.com" target=3D"_blank">john@cpushack.com</a><br><a href=3D"http://www=
.cpushack.com" target=3D"_blank">www.cpushack.com</a><u></u><u></u></p></div=
></div><p class=3D"MsoNormal">&nbsp;<u></u><u></u></p></div></div><p class=3D=
"MsoNormal">&nbsp;<u></u><u></u></p><div><div><p class=3D"MsoNormal">On Sun,=
 Jun 19, 2022 at 9:57 AM SBC-85 &lt;<a href=3D"mailto:craig@sbc-85.com" targ=
et=3D"_blank">craig@sbc-85.com</a>&gt; wrote:<u></u><u></u></p></div><blockq=
uote style=3D"border-top:none;border-right:none;border-bottom:none;border-le=
ft:1pt solid rgb(204,204,204);padding:0in 0in 0in 6pt;margin:5pt 0in 5pt 4.8=
pt"><p class=3D"MsoNormal" style=3D"margin-bottom:12pt">Hi John<br><br>It lo=
oks like these bubble kits have been delivered. Please let me know if there a=
re any issues.&nbsp; Positive feedback on tindie would be appreciated <br><b=
r>Regards<br><br>Craig<br><br>&gt; On Jun 16, 2022, at 4:46 PM, John Culver &=
lt;<a href=3D"mailto:john@cpushack.com" target=3D"_blank">john@cpushack.com<=
/a>&gt; wrote:<br>&gt; <br>&gt; =EF=BB=BFThanks!&nbsp; Some are for my frien=
ds. I am a collector so like old processors and related things. I run <a hre=
f=3D"http://cpushack.com" target=3D"_blank">cpushack.com</a> if ya want to c=
heck it out <br>&gt; <br>&gt; Sent from my iPhone<br>&gt; <br>&gt;&gt; On Ju=
n 16, 2022, at 1:34 PM, SBC-85 &lt;<a href=3D"mailto:craig@sbc-85.com" targe=
t=3D"_blank">craig@sbc-85.com</a>&gt; wrote:<br>&gt;&gt; <br>&gt;&gt; =EF=BB=
=BFHi John, I will box these bubble kits up and take to the post office tomo=
rrow.&nbsp; If I may ask, what do you plan on doing with these?&nbsp; Not ex=
actly a hot market for bubbles, I think my SBC-85 bubble board is the only c=
urrent thing that utilizes these. Since these have been sealed, I can=E2=80=99=
t imagine there would be any problems with the seed bubble.<br>&gt;&gt; <br>=
&gt;&gt; Do you have any intel 4 bit or early 8 bit you are interested in tr=
ading?&nbsp; I am looking for pro-log 04/40 and 8008.&nbsp; <br>&gt;&gt; <br=
>&gt;&gt; Regards<br>&gt;&gt; <br>&gt;&gt; Craig<u></u><u></u></p></blockquo=
te></div></div></blockquote></div></blockquote></div></div></div></div></blo=
ckquote></div></div></blockquote></div></blockquote></div></div></blockquote=
></div></blockquote></div></div></div></div></blockquote></div></div></block=
quote></div></blockquote></div></div></blockquote></div></blockquote></div><=
/div></div></div></blockquote></div></div></div></div></blockquote></div>
</div></blockquote></body></html>=

--Apple-Mail-4509C71D-2C9D-4BEA-B36E-B53517D7EE1F--
