Return-Path: Delivered-To: craig@sbc-85.com Received: from gator4254.hostgator.com by gator4254.hostgator.com with LMTP id gBXAMYNn3WQzzgkAcizydQ (envelope-from ) for ; Wed, 16 Aug 2023 19:19:15 -0500 Return-path: Envelope-to: craig@sbc-85.com Delivery-date: Wed, 16 Aug 2023 19:19:15 -0500 Received: from c-24-20-253-210.hsd1.or.comcast.net ([24.20.253.210]:50433 helo=smtpclient.apple) by gator4254.hostgator.com with esmtpa (Exim 4.96) (envelope-from ) id 1qWQjL-002tQm-29; Wed, 16 Aug 2023 19:19:15 -0500 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: SBC-85 Mime-Version: 1.0 (1.0) Subject: Re: Assertion level logic diagrams Message-Id: <2A8B0F92-EA50-49BD-A9C0-7DF715D13E1C@sbc-85.com> References: In-Reply-To: To: Tom Storey Date: Wed, 16 Aug 2023 17:19:04 -0700 X-Mailer: iPhone Mail (20G75) Hi Tom Can you send the schematic as a pdf, I may get a chance to look at this tom= orrow=20 > On Aug 16, 2023, at 7:02 AM, Tom Storey wrote: >=20 > =EF=BB=BF > Hi Craig, >=20 > Ive been re-watching your assertion level logic videos recently, and I thi= nk it has finally "clicked" with me "what it does and how it works", so I th= ought I would give it a try for a project Im currently working on (a re-desi= gn and revision of an existing project, and moving from EAGLE based schemati= cs to KiCad so I figured I'd start fresh). >=20 > I wonder if you would be kind enough to have a look over the attached sche= matic to see whether Ive got the right idea? Ive tried to follow a similar p= rocess to what you do in your videos, gradually building things up/out and r= esulting in a blob of gates at the end which actually go into my circuit. >=20 > This piece of circuitry is to enable the data bus buffer to allow IO reads= /writes and also to acquire vectors for IM2 interrupts (so the target CPU is= Z80). The function is described in the schematic as well. >=20 > Thanks > Tom >